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Journal of Inorganic Materials

Abbreviation (ISO4): J Inorg Mat      Editor in chief: Lidong CHEN

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Journal of Inorganic Materials >

2024 , Vol. 39 >Issue 4: 345 - 358

DOI: https://doi.org/10.15541/jim20230405

REVIEW

Oxide Neuron Devices and Their Applications in Artificial Neural Networks

  • Zongxiao LI , 1 ,
  • Lingxiang HU 1 ,
  • Jingrui WANG 2 ,
  • Fei ZHUGE , 1, 3, 4, 5
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  • 1. Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201, China
  • 2. School of Electronic and Information Engineering, Ningbo University of Technology, Ningbo 315211, China
  • 3. Center for Excellence in Brain Science and Intelligence Technology, Chinese Academy of Sciences, Shanghai 200031, China
  • 4. Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100029, China
  • 5. Institute of Wenzhou, Zhejiang University, Wenzhou 325006, China
ZHUGE Fei, professor. E-mail:

Received date: 2023-09-05

  Revised date: 2023-11-28

  Online published: 2024-04-25

Supported by

National Natural Science Foundation of China(U20A20209)

Strategic Priority Research Program of Chinese Academy of Sciences(XDB32050204)

China National Postdoctoral Program for Innovative Talents(BX2021326)

China Postdoctoral Science Foundation(2021M703310)

Zhejiang Provincial Natural Science Foundation(LQ22F040003)

Ningbo Natural Science Foundation(2021J139)

Ningbo Natural Science Foundation(2023J356)

State Key Laboratory for Environment-Friendly Energy Materials(20kfhg09)

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Abstract

Nowadays, artificial intelligence (AI) is playing an increasingly important role in human society. Running AI algorithms represented by deep learning places great demands on computational power of hardware. However, with Moore's Law approaching physical limitations, the traditional Von Neumann computing architecture cannot meet the urgent demand for promoting hardware computational power. The brain-inspired neuromorphic computing (NC) employing an integrated processing-memory architecture is expected to provide an important hardware basis for developing novel AI technologies with low energy consumption and high computational power. Under this conception, artificial neurons and synapses, as the core components of NC systems, have become a research hotspot. This paper aims to provide a comprehensive review on the development of oxide neuron devices. Firstly, several mathematical models of neurons are described. Then, recent progress of Hodgkin-Huxley neurons, leaky integrate-and-fire neurons and oscillatory neurons based on oxide electronic devices is introduced in detail. The effects of device structures and working mechanisms on neuronal performance are systematically analyzed. Next, the hardware implementation of spiking neural networks and oscillatory neural networks based on oxide artificial neurons is demonstrated. Finally, the challenges of oxide neuron devices, arrays and networks, as well as prospect for their applications are pointed out.

Key words： oxide; neuron device; brain-inspired computing; neuromorphic computing; artificial neural network; review

Cite this article

Zongxiao LI , Lingxiang HU , Jingrui WANG , Fei ZHUGE . Oxide Neuron Devices and Their Applications in Artificial Neural Networks[J]. Journal of Inorganic Materials, 2024 , 39(4) : 345 -358 . DOI: 10.15541/jim20230405

随着现代信息技术的快速发展, 人工智能(Artificial Intelligence, AI)已经广泛应用于无人驾驶、人脸识别、语音交互、智慧医疗等领域, 为人们的生活提供了诸多便利。目前人工智能是基于深度学习, 在传统冯·诺依曼架构计算设备上利用软件算法来实现的。由于计算架构中存储器和处理器物理分离, 这导致人工智能算法运行时呈现高延时和高功耗, 难以满足现阶段日益增长的数据处理需求。相比之下, 人脑具有效率高、能耗低、容错性强等优点, 可以高效执行认知、学习、推断等高级任务。人脑的高效性主要归功于大脑皮层中大型且复杂的神经网络。人脑神经网络包含约1011个神经元和1015个突触, 其中突触为前神经元和后神经元之间的间隙。突触是神经系统中存储信息和调控神经元连接强度的基本单元。神经元负责整合和计算来自前突触的输入信号, 并输出动作电位到后突触。由神经元和突触构建的人脑神经网络集存储、计算于一体, 可有效避免信息在存储单元和计算单元间的不断搬运, 提高计算效率。受人脑结构和工作机制启发, 科研人员从硬件架构出发, 提出了神经形态计算(类脑计算)的概念[1-2]。区别于传统人工智能, 神经形态计算的核心是构建符合生物动力学的人工突触和神经元器件, 进而直接在硬件层面实现类脑智能。其中, 人工神经元主要负责整合和处理信息, 突触作为神经元间的连接模块负责传递和存储信息。目前, 基于互补金属氧化物半导体(Complementary Metal-Oxide Semiconductor, CMOS)技术的神经形态芯片被相继报道, 包括IBM的TrueNorth芯片[3]、英特尔的Loihi芯片[4]、清华大学的天机芯片[5]、浙江大学的达尔文芯片[6]等。相比于传统冯·诺依曼计算架构, 神经形态芯片在功耗和计算效率方面得到大幅提升。以TrueNorth为例, 芯片采用事件驱动型异步同步电路混合设计方案, 内部含有2.56亿个突触和100万个神经元, 功耗仅为63 mW, 可在分辨率为400×240、帧率为30 fps (frames per second)的视频中实现对多目标的快速探测和识别。然而, CMOS基神经形态芯片依靠复杂的电路实现人工突触和神经元功能。在CMOS器件尺寸接近其物理极限的情况下, CMOS基神经形态芯片难以满足更高集成密度和更低功耗的需求。
近年来, 以铁电器件、自旋器件、忆阻器等为代表的新型电子器件得到了快速发展, 并在模拟人工突触和神经元功能方面展现出巨大优势。氧化物因制备简单、CMOS工艺兼容性好等优点, 在新型电子器件中常作为功能层材料。氧化物基新型电子器件结构简单、能耗低, 可以单器件实现突触的多种可塑性[7-8], 并通过构建突触阵列实施矩阵乘法运算, 进而完成图像的识别和分类等多种任务。相比于突触, 神经元的功能模拟相对困难, 这是因为神经元细胞膜内存在大量不同的电压门控离子通道, 其动态行为更加复杂。神经元可以累积前突触信号, 当累积信号大于膜电位阈值时, 发射尖峰信号, 而后膜电位恢复至静息状态[9]。为高效模拟神经元动态发射特性, 人工神经元器件需要同时实现上述动态行为。根据实现的神经元动力学不同, 目前研究较广泛的神经元模型有霍奇金-赫胥黎(Hodgkin- Huxley, HH)神经元、泄漏-累积-发射(Leaky Integrate-and-Fire, LIF)神经元和振荡神经元。其中, HH神经元呈现的神经元动力学最丰富, 对于硬件模拟人脑神经网络动态行为具有重要意义。作为HH模型的简化版, LIF神经元虽然难以呈现丰富的神经动态行为, 但其电路结构简单、易高密度集成且能够满足大部分类脑计算的要求, 因而受到广泛关注。与HH神经元和LIF神经元不同, 振荡神经元虽然生物可信性欠缺, 但由于振荡神经元集群的耦合振荡和人脑宏观上输出的脑电波类似, 其对研究大量神经元协同共振有着重要意义。
本文对氧化物神经元器件及其神经网络的研究进展进行了梳理与总结。首先从生物神经元结构和功能出发, 概述神经元的数学模型和动力学行为; 然后, 阐述目前新型氧化物神经元器件的最新研究进展, 并在器件层面重点介绍HH神经元、LIF神经元和振荡神经元的工作机制; 进一步, 在系统层面探讨基于LIF神经元的脉冲神经网络硬件和基于振荡神经元的振荡神经网络硬件在执行神经形态计算任务时的差异; 最后, 讨论当前实现氧化物人工神经元硬件面临的挑战, 并展望其未来的发展前景。

1 生物神经元

如图1(a)所示, 生物神经元在结构上通常由树突、胞体和轴突组成。树突短且分枝多, 与前神经元轴突形成突触, 并接受突触传导的神经递质; 胞体负责整合所有突触信息; 轴突则生成尖峰信号, 并通过突触传导至下一个神经元。此外, 神经元细胞膜上的多种电压门控离子(Na+、K+、Ca2+、Cl-等)通道(图1(b))与神经元复杂的动态行为息息相关。在静息状态下，神经元膜内外的电势差被称为静息电位(-70 mV)。当接收前突触兴奋信息时, 神经元膜外Na+向膜内流入, 神经元局部电位增加, 即发生去极化。当Na+达到平衡后, K+向膜外流出, 致使局部电位下降, 即发生超极化。在上述整个过程中, 神经元会产生尖峰信号(动作电位)。由于K+通道关闭延迟, 会产生一段局部电位低于静息电位的时间, 这段时间被称为不应期。在此期间, 神经元即使接收到超过阈值的刺激也不能产生动作电位。如果接收到前突触抑制信号, Cl-通道开启, 并允许其向细胞膜内运动, 可导致神经元进一步发生超极化, 局部电位进一步低于静息电位(图1(c))[10-11]。一个神经元会与多个神经元连接, 同时接收兴奋性和抑制性神经递质, 并整合所有突触信息, 判断是否产生动作电位。神经元膜电位动态过程受离子通道组成、分布、突触信号整合等影响。目前发现的生物神经元发射模式超过20种[12], 说明神经元膜电位呈现出丰富且复杂的动态变化。
图1 生物神经元结构及其动态响应

Fig. 1 Typical structure and dynamic response of biological neuron

(a) Typical structure of biological neuron; (b) Schematic diagram of voltage-gated ion channels in neural membrane; (c) Dynamic changes of membrane potential under stimulation

2 氧化物神经元

2.1 神经元的数学模型

硬件实现人工神经元的前提是充分理解生物神经元膜电位的动态过程, 并通过数学方程进行有效解释。神经科学领域已提出多种神经元模型, 其中HH和LIF模型最受关注。HH模型[13-14]可有效解释生物神经元膜电位和离子通道的动态行为, 其膜电流的数学表达式如下:
$I(t)={{C}_{\text{m}}}\frac{\text{d}{{V}_{\text{m}}}(t)}{\text{d}t}+{{G}_{\text{K}}}({{V}_{\text{m}}}(t)-{{V}_{\text{K}}})+\ {{G}_{\text{Na}}}({{V}_{\text{m}}}(t)-{{V}_{\text{Na}}})+{{G}_{\text{L}}}({{V}_{\text{m}}}(t)-{{V}_{\text{L}}})$
其中I(t)为神经元细胞膜电流，Cm和Vm分别为神经元膜电容和膜电位, GK、GNa和GL分别是K+、Na+和自然泄漏的电导, VK、VNa和VL分别是K+、Na+和自然泄漏的反向电势。尽管通过调整参数, HH模型可以有效解释生物神经元所有的发射模式, 但是在神经形态计算中对硬件要求很高[12]。LIF模型是对HH模型的简化, 其膜电位数学表达式为[15]:
${{V}_{\text{m}}}=I+a-b{{V}_{\text{m}0}}$
其中Vm为神经元细胞膜电位, Vm0为静息电位, I为输入电流, a和b为可调参数。Vm随输入电流增加而增加, 达到膜电位阈值时, Vm恢复为Vm0, 并发射尖峰信号。单纯的LIF模型虽然不具有尖峰频率自适应(Spike Frequency Adaptation)、相位尖峰(Phasic Spiking)、团簇发射(Bursting)、亚阈值振荡(Subthreshold Oscillation)、延迟发射(Spike Latency)、混沌动力学(Chaos Dynamic)等高级神经元功能, 但是其对硬件需求低且能满足基本的类脑计算[16]。
此外, 冯·诺依曼和Wigington[17-18]提出了利用振荡波相位和/或频率耦合呈现的有序集体振荡状态来进行类脑计算的方式。这种集体振荡与人脑电波有异曲同工之处, 因此这种振荡器也可被称为振荡神经元。

2.2 人工神经元的硬件基础

对于类脑神经形态计算, 人工神经元一般需实现以下基本功能:
1) 全有/全无(All or Nothing)特性: 当刺激强度没有达到一定的阈值时, 动作电位就不会发生, 只有当刺激强度达到阈值时, 才会发生动作电位, 并且瞬间达到最大强度。此外, 神经元发出的单个尖峰强度或持续时间不会随刺激强度发生变化[12]。
2) 不应期(Refractory Period): 神经元发射一个尖峰后膜电位需要一段时间恢复到静息态, 这段时间内, 即使接收到兴奋性刺激, 神经元也不会发射尖峰。不应期不仅能防止神经元受伤害, 而且能够在受到持续刺激时逐步降低尖峰输出频率, 减小能耗。这种特性被称为尖峰频率自适应, 其对弱刺激的前向掩蔽[19]、选择性注意和响应[20]等功能具有重要意义。
3) 神经元抑制(Neuron Inhibition): 生物神经元可以同时处理接收到的兴奋信号和抑制信号, 进而确定是否发射动作电位。平衡兴奋和抑制对于生物神经网络的正常活动至关重要[21]。此外, 神经元间还存在侧向抑制(Lateral Inhibition), 即当受到兴奋性刺激后, 兴奋神经元会抑制相邻神经元。侧向抑制功能对于形状边缘检测[22]有重要意义。
受益于成熟的CMOS制造技术, 基于传统硅基晶体管可构建满足类脑计算需求的神经元电路[23⇓-25], 但其结构复杂, 硬件消耗大, 不利于高密度集成。以铁电场效应晶体管(Ferroelectric Field-Effect Transistor, FeFET)、自旋器件、忆阻器等为代表的新型器件为实现可高密度集成和高能效的人工神经元提供了有效的技术途径。例如, 铁电材料通过调控外界电场极性可使其极化方向可逆反转, 其中氧化物铁电材料最受关注[26-27]。用铁电材料作为栅介质构建的FeFET在栅极施加连续电压脉冲时铁电极化强度随之增加, 沟道电流将呈现非线性增长, 这一特性与生物神经元膜电位累加过程类似。类似地, 自旋电子器件是一种利用电子的自旋和磁矩, 在高阻态和低阻态间发生可逆转变的新型器件, 而氧化物常作为器件的隧穿层[28]。通过电流调控器件内磁畴尺寸, 可实现器件隧穿电流增长, 进而模拟神经元膜电位累加过程。在适当外围电路的帮助下, FeFET和自旋器件可实现生物神经元的功能, 包括全有/全无特性、不应期等。
此外, 忆阻器有着不同于普通电阻的非线性电学性质, 其忆阻值可以在外界信号刺激下连续可逆调控, 并能在断开刺激后保持变化后的状态[29]。忆阻器通常为三明治(电极/功能层/电极)结构, 具有结构简单、易高密度集成、能耗低以及读写速度快等优势。随着研究深入, 忆阻器可分为非易失性和易失性两种, 其中非易失性忆阻器包括阻变存储器、相变存储器等, 而易失性忆阻器(阈值阻变)器件包括导电丝型忆阻器和Mott忆阻器。非易失性和易失性忆阻器均可用于构建人工神经元电路, 所不同的是非易失性忆阻器需置位电路使其在神经元发射后恢复至初始态。

2.3 HH神经元的硬件实现

硬件实现HH神经元需模拟生物神经元离子通道的动态行为。2013年蔡少棠[30]提出了一种利用忆阻器构建HH神经元的模型, 随后Pickett等[31]利用易失性的NbO2基Mott忆阻器来模拟打开和关闭K+通道和Na+通道, 在两个直流电压源的帮助下模拟K+和Na+通道的反向电势。精心设计辅助元件可以使两个等效离子通道的切换遵循生物神经元中的顺序, 进而模拟了生物学上不同阶段的动作电位, 即超极化、去极化和不应期。在此基础上, 2018年Yi等[32]利用两个VO2基Mott相变忆阻器设计了HH神经元(图2(a)), 可呈现23种不同的神经元发射行为, 其中包括一些高级行为, 如共振发射(图2(b))、抑制诱发发射(图2(c))、频率自适应性发射(图2(d))等。虽然该神经元器件可模拟神经元膜电位和离子通道的动态行为, 然而在实际操作时需不断调整电路参数, 操作较复杂。2022年Xu等[33]利用VO2基HH神经元模拟了人工视网膜在不同光照条件下的自适应感知功能。HH神经元电路需连接外置电源用于模拟Na+和K+的反向电势。然而, 电源的CMOS工艺兼容性差, 限制了HH神经元的进一步微型化。2019年Huang等[34]利用WO3基忆阻器内在电池效应构建了一种准HH神经元电路, 实现了包括超极化在内的全有/全无特性。尽管未实现更多高级功能, 然而其利用内在电池效应的理念为HH神经元的微缩化提供了一种可行的技术途径。
图2 基于VO2忆阻器的HH神经元[32]

Fig. 2 Hodgkin-Huxley (HH) neuron based on VO2 memristors[32]

(a) HH neuron circuit based on VO2-based memristors; (b) Output resonator spiking of VO2-based HH neuron; (c) Output inhibition-induced spiking of VO2-based HH neuron; (d) Spike frequency adaptation property of HH neuron

目前硬件实现HH神经元的研究仍然较少。虽然理论仿真表明基于HH神经元网络能够执行布尔逻辑运算[35], 但充分利用HH神经元动力学的计算应用仍然缺失。

2.4 LIF神经元的硬件实现

2.4.1 铁电神经元

很多氧化物具有铁电性, 如BaTiO3[36]、Pb(ZrxTi1-x)O3[37]、BiFeO3[38]等, 然而其CMOS工艺兼容性欠缺。自CMOS工艺中常用的HfO2被发现具有铁电性[39]以来, FeFET器件受到了广泛的关注。2018年Mulaosmanovic等[40-41]研究了Si:HfO2在电压脉冲下极化强度累积特性及铁电畴形核的随机性。进一步地, 利用Si:HfO2基FeFET构建了LIF神经元[42]，在不同电压脉冲幅值和脉宽下实现了全有/全无特性。此外, FeFET神经元同时接收兴奋性和抑制性信号时, 发射一个尖峰信号所需的兴奋性电压脉冲数量会随着抑制电压幅值增大而增加。然而, 由于非易失性, 铁电神经元中通常需要包含置位电路和脉冲发生器。Chen等通过调控Hf0.5Zr0.5O2结晶度实现了自发复位的FeFET, 进而构建了具有频率自适应性发射功能的LIF神经元[44]和无需电容的LIF神经元[45]。然而, 铁电材料结晶度调控难度高, 难以满足器件大规模集成需求。2022年Cao等[43]利用Hf0.2Zr0.8O2反铁电薄膜构建反铁电晶体管(图3(a))。不同于铁电材料, 反铁电材料在电场作用下呈现电滞回线, 撤去电场后剩余极化为零。如图3(a)中上图所示, 反铁电晶体管在负栅压下为关闭状态, 正栅压下为开启状态。随着正栅压幅值增加, 反铁电材料极化强度增加, 器件电流增加。而随着栅压降低, 由于电滞回线的影响, 器件电流呈现回滞特性。当栅压为零时, 反铁电材料剩余极化为零, 器件关闭。因此, 器件在电压脉冲刺激下的电流呈现先增加后下降的现象, 其中自发的电流下降现象与神经元的泄漏类似。如图3(a)中下图所示, 器件在恒定幅值的连续电压脉冲刺激下, 器件电流表现出累积增加和自发泄漏的现象。如图3(b)所示, 通过在栅极施加不同幅值电压脉冲, 器件可模拟神经元膜电位动态累积和泄漏行为。搭建神经元电路(图3(c))可实现LIF发射行为和不应期。该人工神经元无需置位电路和额外的微结构调控, 降低了电路复杂性和能耗。
图3 基于反铁电场效应晶体管的LIF神经元[43]

Fig. 3 Leaky integrate-and-fire (LIF) neuron based on antiferroelectric field effect transistor[43]

(a) Volatile typical transfer curves of an antiferroelectric field effect transistor (AFeFET) (up) and continuous firing events of an AFeFET neuron under voltage pulses (down); (b) Dynamic of leaky and integration process of an AFeFET neuron under gate pulse with different amplitudes; (c) Artificial neuron circuit diagram based on AFeFET

2.4.2 自旋神经元

自旋器件的核心单元为磁隧道结(Magnetic Tunneling Junction, MTJ), 由两层铁磁层和中间一层非磁隧穿层构成, 其中隧穿层材料常采用MgO。通过施加电流脉冲可以调控MTJ中一铁磁层磁矩方向, 可使器件在高阻态和低阻态间可逆转变 [46-47]。利用自旋轨道矩(Spin Orbit Torque, SOT)特性构建的MTJ在多阻态存储方面具有一定的优势。Kurenkov等[48]通过调控器件厚度模拟了生物突触可塑性和神经元动态行为, 然而该神经元激活函数依然为二值函数。Yang等[49]报道了一种各向异性的自旋器件。通过施加电流脉冲, 磁畴的畴壁逐步发生位移, 霍尔电阻呈现非线性变化, 可以模拟神经形态计算中常用的Sigmoid激活函数, 而且激活函数可通过磁场调控。Liu等[50]利用补偿铁磁体完成了类似的工作。
类似于FeFET神经元, 研发易失性的MTJ以实现神经元自动置位是当前的研究热点。2023年Wang等[51]以MgO为隧穿层，利用反铁磁材料构建了易失性SOT-MTJ(图4(a))。在磁场和电流刺激下, 磁畴从左向右逐渐生长, 可实现累积功能(图4(b))。电流为零时, 器件内残存的焦耳热调控器件内建磁场和Ruderman-Kittel-Kasuya-Yosida耦合效应的相互竞争, 导致磁畴从右向左生长, 从而模拟神经元泄漏功能。图4(c)展示了在电流脉冲下器件模拟LIF神经元累积和泄漏的动态过程。该神经元发射频率达17 MHz, 单次发射行为能耗为486 fJ。以该神经元为基础构建两层神经网络在手写字母识别任务中的准确率可达88.5%。
图4 基于反铁磁材料的LIF神经元[51]

Fig. 4 LIF neuron based on an antiferromagnetic spintronic device[51]

(a) Schematic of an antiferromagnetic spintronic device; (b) Schematic of a polar magneto-optic Kerr effect microscope setup for in-situ magneto-electrical transport probing (up) and its measured domain wall position of hall bar under current stimuli (down); (c) Domain wall position signal (up), neural threshold signal (middle) and output voltage spike dynamics (down) of the antiferromagnetic spintronic device under current stimuli with inset presenting dynamics of domain wall motion

2.4.3 忆阻神经元

多种材料可作为忆阻器的功能层, 包括氧化物[52-53]、硫化物[54-55]、有机物[56]等, 其中氧化物因CMOS工艺兼容性好、制备工艺简单等优点备受关注[57]。根据阻变机理分类, 氧化物忆阻器可分为导电丝型和电子型[57-58]。导电丝型是指忆阻器自身氧空位或电极金属离子迁移, 进而形成导电细丝。导电细丝的形成和断裂诱发了忆阻器的电阻转变。电子型忆阻器的阻变机制是氧化物缺陷对载流子的捕获和释放[59]。根据数据保持性, 忆阻器可分为非易失性和易失性。非易失性忆阻器在完成阻变后, 电阻值可继续保持。在电压脉冲刺激下, 忆阻器可呈现多电阻态, 这与神经元累积过程类似。非易失性忆阻器在置位电路、比较器和脉冲发生器的辅助下可实现LIF神经元[60⇓-62]。然而, 这种人工神经元电路结构复杂，硬件消耗大，能耗高。
相比于非易失性忆阻器, 易失性忆阻器呈现阈值阻变(Threshold Switching, TS)特性。当施加电压超过阈值电压(Vth)时, 器件将由高阻态突变为低阻态； 而当施加电压低于保持电压(Vh)时, 器件自动恢复至高阻态(图5(a))[63]。这一特性适合模拟神经元膜电位自恢复行为, 避免使用复杂的置位电路[64]。Mott忆阻器[65⇓⇓-68]、导电丝型忆阻器[69⇓-71]都可呈现TS, 其神经元电路结构相同[72]。图5(b)展示了NbOx基TS神经元电路[63], 其中RL为分压电阻，RS为测试电阻，C为器件寄生电容或外置电容。RL需远小于TS忆阻器高阻态, 且远大于低阻态; 电容C用于模拟神经元膜电位; RS则远小于忆阻器低阻态。当输入恒定电压时, 由于TS忆阻器初始态为高阻态, 电路中“1-2-4-1”环路的时间常数小于“2-3-4-2”环路的时间常数, 此时电路中电容C将充电。当电容电压达到TS忆阻器Vth时, 忆阻器瞬间转变为低阻态。由于电路时间常数变化, 电容随之放电。当电容电压小于忆阻器Vh时, 忆阻器由低阻态转变为高阻态, 进而电容开始新一轮充电/放电循环。节点“2”处电压呈现出振荡式发射行为, 可用于构建振荡神经元(具体见2.5节), 而节点“3”处的电流呈现出LIF型尖峰发射特性(图5(c))。电路输入电压尖峰时, 只有忆阻器分压超过Vth才可输出电流尖峰, 此特性符合生物神经元全有/全无发射行为。此外, 该神经元实现了不应期和线性整流(Rectified Linear Unit, ReLU)型激活函数。通过控制TS器件限制电流可实现其阈值电压调控, 进而调控第一个尖峰的发射延迟[74]。TS阻变机制存在一定随机性, 利用这种内在随机性可增强识别准确率和高阶推理能力[75⇓⇓⇓⇓⇓⇓⇓-83]。
图5 氧化物忆阻器基LIF神经元研究

Fig. 5 Researches of LIF neurons based on oxide memristors

(a) Typical I-V curve of a NbOx-based TS memristor[63]; (b) Schematic diagram of artificial spiking neuron circuit based on NbOx-based memristor[63]; (c) Oscillation and output spiking characteristics of memristive neuron under constant voltage stimuli[63]; (d) Schematic illustration of an optoelectronic neuron with ITO/IGZO/Ag/Ta2O5/ITO structure[73]; (e) Comparison of fire dynamics of the optoelectronic neuron under dark and ultraviolet light[73]; (f) Fire frequency of the optoelectronic neuron as a function of light intensity at different wavelengths[73]

TS单器件也可以实现LIF神经元[84⇓⇓⇓-88], 但其发射行为单一。2022年Li等[89]将导电丝型TS忆阻器和晶体管无缝集成, 构筑了单晶体管结构的神经元, 无需连接电阻和电容便可实现丰富的神经元动力学, 如全有/全无发射、阈值驱动发射、阈值调控等。更为重要的是, 调控栅压可使晶体管关闭, 进而实现神经元抑制。当栅压和漏极分别输入抑制和兴奋信号时, 器件可同时整合兴奋性和抑制性空间信号。此外, 利用传感器替代分压电阻与TS器件集成可以构筑输入性神经元[90⇓-92]。为了提高传感器和TS器件的集成度, 2023年Wan团队[73]基于ITO/IGZO/ Ag/Ta2O5/ITO垂直结构(图5(d)), 将光电传感器和TS器件集成为人工视锥神经元。由于寄生电容的作用, 该器件可直接将连续光信号转变为电压尖峰信号(图5(e))。在360、405和532 nm波长光照射下, 该光电神经元输出的尖峰频率处于不同数量级(图5(f))。基于这一特性, 该团队进一步识别了由三种波长光组成的混色图像。

2.5 振荡神经元的硬件实现

与LIF神经元输出时间相关的尖峰信号不同, 振荡神经元在超出阈值的恒定刺激(电压/电流)下输出连续尖峰, 其核心为多个振荡神经元间的同步特性。FeFET[93]、Mott忆阻器[68,94⇓⇓⇓ -98]、自旋器件[99⇓⇓⇓-103]、导电丝型忆阻器[104⇓-106]都可以构建振荡神经元。由于铁电极化回滞的作用, 铁电基振荡神经元的输出频率在栅压双向扫描下呈现回滞特性[93]。自旋振荡神经元由于有限磁化弛豫, 其振荡波幅值具有记忆性, 其频率容易与另一个自旋神经元耦合锁定[101,107]。Romera等[108]利用三个MTJ振荡神经元构筑了振荡电路(图6(a))。如图6(b)所示, 三个MTJ神经元能够独立发射微波信号, 且输出频率处于分离状态。当微波在线路中传播时, 三个神经元频率完成耦合(图6(c))。
图6 振荡神经元耦合电路及其振荡波同步输出图

Fig. 6 Coupling circuits of oscillation neurons and the output mutual waves

(a) Circuit schematic of three spin-torque nano-oscillators connected electrically[108]; (b) Unsynchronized oscillatory wave of the three coupled oscillators[108]; (c) Synchronized oscillatory wave of the three coupled oscillators[108]; (d) Coupled circuit consisting of two VO2-based oscillators[96]; (e) In-phase voltage oscillatory waves of VO2-based coupled circuit[96]; (f) Out-of-phase voltage oscillatory waves of VO2-based coupled circuit[96]

基于Mott器件和导电丝型忆阻器构建的振荡神经元电路结构与其LIF神经元一致[94]。以NbOx振荡神经元为例, 当施加恒定电压时, 电路可释放振荡波。振荡波输出频率可以通过电容和施加电压幅值进行调控[109]。当输入电压远超过Vth时, 电路可自动停止输出振荡波, 保护神经元[110]。神经元间同步振荡行为是利用振荡神经元进行类脑计算的基本要求[95]。Corti等[96]利用VO2忆阻器构建了两个振荡神经元(图6(d)), 通过调节RC, 两个神经元振荡波形相位可实现同相(图6(e))和异相(图6(f))耦合, 且同相和异相振荡能够可逆转变。
振荡神经元电路通常包含电阻和电容等元器件, 减少或消除电阻和电容的使用, 从而有利于提高神经元集成度。Hua等[113]利用器件本身内在寄生电容, 仅通过串联电阻实现了振荡神经元。Yang等[115]利用低熔点Te导电丝不断的形成和溶解特性, 单器件实现了振荡神经元。然而, 上述工作并未实现电路耦合。
表1列举了代表性的HH神经元、LIF神经元和振荡神经元的性能, 从神经元电路复杂度、工作电压、最低能耗、高级功能实现等方面评估人工神经元。
表1 氧化物基HH、LIF和振荡神经元性能对比

Table 1 Performance comparison of HH, LIF and oscillation neurons based on oxides

Type Device structure Physics Auxiliary
circuit		 Operation stimulus Highest output frequency Energy consumption per spike Advanced function Ref.
HH Pt/VO2/Pt Mott 2S2R2C*
2S1R3C*
2S2R3C*		 Current/
Voltage		 <60 kHz 5.6 fJ 23 types of biological
neuronal behaviors		 [32]
W/WO3/PEDOT:PSS/Pt Proton migration CMOS 2 V — — Local graded potential,
all or nothing		 [34]
LIF Si:HfO2-based FeFET Polarization switching 6T* 2.4 V — — Integration of excitatory
and inhibitory inputs		 [42]
Hf0.5Zr0.5O2-based FeFET Polarization switching 5T1C* 1.8 V — — Spike frequency adaptation [44]
Hf0.2Zr0.8O2-based FeFET Polarization switching 6T1R* 1.8 V — 37 fJ Adjustable output frequency [43]
MTJ Spin 1T* — 17 MHz 486 fJ Adjustable output frequency [51]
Pt/Ag/TiN/HfAlOx/Pt Filament 2R1C* 1.5 V — 16 fJ Adjustable output frequency [111]
Ag/SiO2/SiO2.03/Pt Filament 2R1C* 0.1 V — 2 fJ Adjustable output frequency [79]
Au/VO2/Au Mott 2R1C* 5 V 1 MHz 2.9 nJ Adjustable output frequency [112]
Si/NbO2/TiN Mott 1R* 2 V 900 kHz 38 pJ Self-protection [110]
Oscillation Pt/TaOx/Ta/Pt Filament 1R1C* 4-6V 250 MHz 300 μW Adjustable output frequency [105]
Ag/HfOx/Pt Filament 1R* 0.6 V ~80 kHz 1.8 µW Adjustable output frequency [113]
Pt/NbOx/Pt Mott 1R1C* 4 V 33 MHz — Adjustable output frequency [94]
VO2 Mott 1R1C* 2.5 V 1 MHz 735 mW Coupling [114]

* S: Source; R: Resistor; C: Capacitor; T: Transistor

3 基于氧化物神经元的人工神经网络

脉冲神经网络(Spiking Neural Network, SNN)硬件由大量人工神经元和突触组成, 信息被编码为时空尖峰信号。相比SNN, 振荡神经网络(Oscillatory Neural Network, ONN)利用多个振荡神经元间振荡波的同步, 通过振荡频率和相位变化来编码信息。本节将着重介绍SNN硬件和ONN硬件的研究进展。

3.1 脉冲神经网络

鉴于软件神经元和CMOS神经元的能效问题, 研究人员一直尝试采用新型人工神经元来构建高性能SNN硬件。2018年Wang等[116]通过集成Pt/Ag/ SiOx:Ag/Ag/Pt结构TS忆阻器神经元和Pd/HfOx/Ta结构人工突触, 实现了全忆阻型SNN硬件, 其中突触阵列为8×3交叉阵列结构, 每一列集成一个具有ReLU型激活函数的人工神经元(图7(a)), 系统演示了四个字母的模式分类功能。每一列突触充当卷积滤波器, 而神经元用于整合每一列的突触权重。输入子图像的特征可以通过其对应的神经元尖峰发射行为来表示。经无监督学习后, SNN可以将四个字母的图像分为三组(图7(b))。这项工作为全忆阻型SNN网络的实现奠定了重要基础。类似地, Duan等[117]基于TaOx突触和NbOx神经元构建了一种4×4突触阵列的SNN。NbOx神经元除实现传统阈值驱动的时空尖峰整合外, 同时完成了包括异或函数在内的非线性函数和不同突触输入间的乘法增益调制。
图7 基于氧化物神经元硬件的SNN研究

Fig. 7 Researches on hardware implementations of spiking neural network (SNN) based on oxide neurons

(a) Schematic of an SNN with 8×3 array network for unsupervised learning[116]; (b) Evolution of input voltages, neuron currents and synaptic weights in the unsupervised learning process[116]; (c) Neuromorphic circuit based on hybrid memristor/CMOS neurons[119]; (d) Circuit diagram of the V/VOx/HWOx/Pt-based SNN hardware system[120]; (e) Output spike frequency (Vout) as a function of resistance of R-mode device[120]

Li等[118]报道了一种基于多树突人工神经元的SNN硬件。Pt/TaOx/AlOδ/Al结构忆阻器用于模拟神经元的树突, 而NbOx基TS忆阻器则模拟胞体。两者相连构建了多树突神经元。该神经元可过滤低电压信号, 并对高电压输入信号进行积分。多树突神经元与TiN/HfOx/TaOx/TiN突触阵列集成后形成单层SNN硬件。利用反向传播算法, 该网络实现了数字识别功能。树突器件不仅过滤了输入图像中的背景噪声, 还可凸显图像关键信号, 从而提高了识别精度。此外, 侧向抑制是生物神经网络中一种重要的特性, 模拟该功能可以有效降低神经网络整体能耗。Zhang等[119]利用SiO2基TS忆阻器和CMOS电路搭建了具有侧向抑制功能的LIF神经元。当一个神经元发射尖峰后, CMOS电路可向相邻神经元输出抑制信号。研究人员进而搭建了一种实现赢者通吃的SNN硬件(图7(c))。当神经元N1被激活时, 通过侧向抑制阵列向其他神经元施加抑制信号, 从而抑制其发射尖峰。研究人员基于该SNN硬件实现了数字识别。
2022年Fu等[120]构建了V/VOx/HfWOx/Pt结构忆阻器。通过调控施加电压幅值, 该器件可实现非易失(R-mode)和易失性(S-mode)阻变特性, 进而实现人工突触和神经元功能。为避免突触器件和神经元器件直接相连时的相互影响, 研究人员在突触和神经元间添加了放大模块, 进而构建了全忆阻SNN(图7(d))。放大模块不仅能稳定突触器件的分压, 使神经元的输入电流保持不变, 而且还能放大低幅值输入电压。如图7(e)所示, 随着突触电阻降低, 神经元输出频率也降低。

3.2 振荡神经网络

脑电波是人脑神经网络产生的宏观有节律振荡信号。不同频率脑电波对应不同的思维活动。研究人员一直在试图寻找振荡行为和神经元活动间的关系。利用振荡神经元间耦合构建ONN为模拟脑电波提供了有效的技术途径。在ONN中, 通常使用振荡波相位(0°~180°)编码信息。在工作时, 振荡神经元在多个不同相位状态下平行振荡, 直到彼此间耦合。ONN的工作机制与Hopfield网络高度一致[122]。理论上MTJ[101]、Mott器件[123-124]、导电丝型器件[106]都可用于构建ONN硬件, 其中VO2由于输出频率高(3 GHz)、耦合动力学丰富[95,125]等优势而备受关注。Nunez等[126]提出了一种利用次谐波注入锁定(Sub-Harmonic Injection Locking, SHIL)来确保每个VO2振荡神经元相位信息在编码时只取两个值的ONN架构。通过输入频率为振荡神经元固有频率两倍的同步信号来实现SHIL, 以稳定振荡器频率。VO2振荡神经元输出静态同相和反相信号, 并被编码为突触的正负权重。该架构使用静态逻辑电路来驱动相变, 可以提高ONN的鲁棒性。为使两个或多个VO2振荡神经元同步, 通常需并联电阻和电容。虽然可以形成不同的相位差, 但调整连接强度较为困难。针对这一问题, Shamsi等[114]基于VO2振荡器和忆阻器桥接电路提出一种差分ONN硬件架构。每个差分振荡神经元由一对反相工作的VO2振荡器组成。通过这种方式, 神经元提供一对相位相反的输出信号。忆阻器桥接电路被用于调节连接强度, 并提供正负权重。目标图案中每个像素值由相对于参考神经元的相位表示。在初始阶段, 白色像素对应的神经元先进行正分支通电, 而后再给负分支通电。黑色像素对应的神经元则顺序相反。提取特定周期的像素值时, 需对比神经元正负分支的电压峰值和参考电压峰值间的时间差。如果时间差为零(或周期的一半), 则分配一个白色(或黑色)像素。最小同步水平对应于信号之间偏差最大的时刻, 而最大同步水平对应于神经元同相或反相时。该ONN使用标准Hebbian规则进行训练, 计算精度与经典Hopfield神经网络相当。
伊辛(Ising)模型可以描述物质相变的随机过程, 能够有效解决ONN中由于组合优化规模增大而导致的计算量指数级增长的问题。Dutta等[121]使用八个VO2基振荡神经元实现了伊辛-哈密顿解算器(Ising Hamiltonian Solver)。自旋向量可用对称耦合矩阵定义的伊辛-哈密顿量来重新表述, 并映射到伊辛解算器(图8(a))。图中每一节点的伊辛自旋由VO2神经元表示。图8(b)展示了单个神经元的电路和VO2器件的扫描电镜照片。为了模拟伊辛自旋(σ), 外部注入锁定信号(Sinj)在经过电容(Cinj)后被施加至所有神经元。为了给每个神经元配备二元自由度来编码上旋和下旋状态, Sinj频率被设置为神经元固有频率的两倍。在所有神经元同步后, 神经元的相位可以导出系统最小能量态。解决组合优化问题时, 大量局部极小值降低了达到全局最优的概率。采用Mott相变中内在的随机性来扰动系统状态, 可以避开局部最小值。通过增加Sinj强度可逐渐减少神经元相位随时间的波动, 帮助执行经典的退火算法, 进而逐步获得最优解。如图8(c)[ii]和[iii]所示, 由于二次谐波注入锁定现象, 同步后振荡器波形显示出的同相(40°)和反相(220°)分别对应于上自旋和下自旋。在八个神经元同步后, 振荡波将稳定在同相或反相状态, 以表示最佳图像切割方案。
图8 基于VO2振荡神经网络的伊辛解算器[121]

Fig. 8 VO2 oscillator-based oscillatory neural network (ONN) for Ising Hamiltonian solver[121]

(a) Eight-node Ising model; (b) Schematic of a phase-transition nano-oscillator consisting of a VO2-based memristor in series with a transistor (left) and the scanning electron microscopy image of the VO2-based memristor (right); (c) Measured oscillatory waveforms in no-synchronization state, first-harmonic injection-locking and second-harmonic injection-locking

4 结论与展望

近年来, 基于新型氧化物电子器件的人工神经元取得了卓著的进展, 被应用于各种神经形态硬件架构。然而, 目前神经形态硬件在功耗、规模、功能等方面与人脑尚有很大差距, 难以满足现阶段大规模计算的需求。基于人工神经元的神经形态硬件尚处于研究的起步阶段, 在器件、阵列和系统等方面仍需解决诸多科学技术问题。
在器件层面, 人工神经元研究虽然取得诸多进展, 然而尚处于模拟部分生物神经元动力学的阶段, 神经元器件尚需在功耗和稳定性等方面进一步优化。1) 功耗: 生物神经元产生单个尖峰能耗为飞焦级, 静息能耗为皮瓦级[127-128]。目前人工神经元能耗普遍大于生物神经元, 尤其是静息能耗。降低尖峰发射能耗的方法有提高尖峰发射速度、降低工作电流等。例如, Mott转变和TS器件可通过优化器件结构或材料成分来降低器件的阈值电压和低阻态电流[72,79,111,129]。至于静息能耗, 则可通过降低器件高阻态电流实现。较低的工作电流会降低器件开关速度, 因此在优化能耗时需统筹考虑神经元的工作频率。对于振荡神经元, 输出振荡波需施加恒定的电压/电流, 在此过程中神经元消耗能量较高。自旋振荡神经元可通过采用能够产生自旋转移力矩的拓扑绝缘体来取代铁磁层以提高能量效率。Mott转变器件通常具有较高的高阻态电流, 可通过降低介质层厚度或控制相变区域的方式降低阈值电压。2) 稳定性: 基于新型氧化物电子器件的神经元通常存在器件与器件之间以及单个器件不同循环间的电学特性差异。这种随机性虽可用于概率神经形态计算[78,81,130], 但其核心问题是每个器件都需具有稳健的随机激活函数, 并获得可重复的神经元响应。提高介质层薄膜质量是减少内在随机性的有效手段[112]。
在阵列层面, 人工神经元通常需要和人工突触器件集成, 以构建神经形态硬件系统。然而, 目前多数研究只是将神经元、突触简单互连, 难以发挥高集成阵列并行计算的优势。因此, 在集成过程中需要考虑不同组件在电气和机械性能方面的兼容性。此外, 人工神经元中通常包含电阻、电容、晶体管等电子器件, 在构建神经元阵列时, 需在不影响性能前提下精简神经元辅助电路结构。例如, 利用器件本身寄生电容, 减少电路电容数量, 以及设计新型神经形态器件结构, 使其具备更多的功能。
在系统层面, SNN硬件已经成功使用Hebbian规则和梯度下降方法执行监督和无监督学习规则, 并用于图像识别。然而, 这些SNN硬件中人工神经元数量较少, 只能处理小像素图像。构建高性能的SNN硬件系统不仅需要集成更多的神经元和突触, 而且需构筑多层SNN架构。此外, 人工神经元和突触需要在制备工艺兼容性、工作电压(电流)和生物动力学(神经元模型、突触可塑性)匹配等方面进行统筹协调。至于ONN硬件, 神经元间的相互耦合是实现高能效计算的关键。然而, 随着神经元数量增加, 硬件中电阻/电容数量将呈指数式增长, 同时神经元间互连难度急剧增加。开发3D堆栈技术使神经元间垂直集成可有效降低互连难度。
综上所述, 构建具有丰富生物动力学行为的人工神经元网络硬件面临材料选择、器件制备、电路设计和制造等方面的诸多挑战。要解决这些困难, 需要材料学、生物学、物理学、电子学等多个学科通力合作, 协同开发。相信在不久的将来, 可以构建出高性能、低能耗的氧化物神经元硬件, 为开发新一代人工智能系统奠定硬件基础。

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